They delivered 490 basis points of margin expansion while running assembly lines at 40% capacity.
Thesis: This is a pure operating leverage play. ChipMOS proved that a minor revenue bump (+18%) flows disproportionately to margins (+490bps) because their fixed costs are covered. The Bear case misses the forest for the trees: yes, DDIC testing is tight, but Memory assembly (33% of revenue) is sitting at 40% utilization. As memory rebounds in H2, that empty capacity fills with zero incremental capex, driving the next leg of margin expansion. You aren't buying growth; you're buying the fill-rate on paid-for assets.
Verdict: LONG — Conviction: HIGH
Catalyst: Q3 Memory rebound. Management explicitly guided DRAM clarity by mid-Q3 and NAND rebounding, which fills the 40% utilization hole.
Key Risk: China 28nm wafer constraint. If foundries can't supply the wafers, ChipMOS's high-end testers sit idle regardless of demand.
The Tell: When pressed on pricing, S.J. Cheng bifurcated the answer: holding firm on high-end but 'retaining some flexibility' on low-end testers to buy utilization. This admits the commodity nature of the legacy business while ring-fencing the OLED margin.
Friction Level: MODERATE_FRICTION — Bears see a capacity ceiling in DDIC; Bulls see massive operating leverage as Memory (33% of rev) lifts off the 40% utilization floor.
Report not found
The report data is no longer available. Please return to the archive.